HOME > What's NEW > 2007 > 『Low-jitter PLL circuit for digital equipment』 was adopted for 「Original seeds development business』 of JST.

October 26, 2007 『Low-jitter PLL circuit for digital equipment』 was adopted for 「Original seeds development business』 of JST.

New technological development concerning 『Low noise phase synchronous circuit used for the digital device』 was adopted for the innovative venture development （Original seeds development business） by Japan Science and technology Agency （JST） in FY2007.


Innovative venture development in FY2007 （Original seeds development business）